#include "PalmType.h"
#include "PalmChip.h"

void Run_11Mhz()
{
	XBYTE[PLL_BYPASS] &= 0xfe;
	XBYTE[PLL_CONWS] = 0x0; // 0 wait state
	XBYTE[PLL1_SUP] = 36;	// 12MHz * (37/40) = 11.1MHz
	XBYTE[PLL1_SDN] = 39;
	XBYTE[PLL1_MODE] = 0xc;
	XBYTE[PLL_CTRL] &= 0xfe;

    while(!(XBYTE[PLL_CTRL] & 0x10));
	XBYTE[PLL_BYPASS] |= 0x01;	// use PLL1 as system clock 

//	XBYTE[SDRAM_REFL] = 0xad;			// reset sdram refresh rate 
//	XBYTE[SDRAM_REFH] = 0x00;
}

void Run_12Mhz()
{
	XBYTE[PLL_BYPASS] &= 0xfe;
	XBYTE[PLL_CONWS] = 0x0; // 0 wait state
	XBYTE[PLL1_SUP] = 0x0;	// 12MHz * (1/1) = 12MHz
	XBYTE[PLL1_SDN] = 0x0;
	XBYTE[PLL1_MODE] = 0x0;
	XBYTE[PLL_CTRL] &= 0xfe;

    while(!(XBYTE[PLL_CTRL] & 0x10));
	XBYTE[PLL_BYPASS] |= 0x01;	// use PLL1 as system clock 

//	XBYTE[SDRAM_REFL] = 0xea;			// reset sdram refresh rate 
//	XBYTE[SDRAM_REFH] = 0x00;
}

// 40/12 = 3.3333
void Run_40Mhz()
{
	XBYTE[PLL_CONWS] = 0x1a; // 11 wait state
	XBYTE[PLL_BYPASS] &= 0xfe;
	XBYTE[PLL1_SUP] = 0x9;	// 12MHz * (10/3) = 40MHz
	XBYTE[PLL1_SDN] = 0x2;
	XBYTE[PLL1_MODE] = 0x6;
	XBYTE[PLL_CTRL] &= 0xfe;

    while(!(XBYTE[PLL_CTRL] & 0x10));
	XBYTE[PLL_BYPASS] |= 0x01;	// use PLL1 as system clock 

//	XBYTE[SDRAM_REFL] = 0x70;			// reset sdram refresh rate 
//	XBYTE[SDRAM_REFH] = 0x02;
}

void Run_26Mhz()
{
	XBYTE[PLL_BYPASS] &= 0xfe;
	XBYTE[PLL_CONWS] = 0x0; // 0 wait state
	XBYTE[PLL1_SUP] = 42;	// 12MHz * (43/20) = 25.8MHz
	XBYTE[PLL1_SDN] = 19;
	XBYTE[PLL1_MODE] = 0xe;
	XBYTE[PLL_CTRL] &= 0xfe;

    while(!(XBYTE[PLL_CTRL] & 0x10));
	XBYTE[PLL_BYPASS] |= 0x01;	// use PLL1 as system clock 

//	XBYTE[SDRAM_REFL] = 0x92;			// reset sdram refresh rate 
//	XBYTE[SDRAM_REFH] = 0x01;
}

// 36.75\25.8 = 1.424
void Run_37Mhz()
{
	XBYTE[PLL_CONWS] = 0x11; // 2 wait state
	XBYTE[PLL_BYPASS] &= 0xfe;
	XBYTE[PLL1_SUP] = 48;	// 12MHz * (49/16) = 36.75MHz
	XBYTE[PLL1_SDN] = 15;
	XBYTE[PLL1_MODE] = 0xe;
	XBYTE[PLL_CTRL] &= 0xfe;

    while(!(XBYTE[PLL_CTRL] & 0x10));
	XBYTE[PLL_BYPASS] |= 0x01;	// use PLL1 as system clock 

//	XBYTE[SDRAM_REFL] = 0x3d;			// reset sdram refresh rate 
//	XBYTE[SDRAM_REFH] = 0x02;
}

// 41/22.2 = 1.847
void Run_41Mhz()
{
	XBYTE[PLL_CONWS] = 0x13; // 4 wait state
	XBYTE[PLL_BYPASS] &= 0xfe;
	XBYTE[PLL1_SUP] = 40;	// 12MHz * (41/12) = 41MHz
	XBYTE[PLL1_SDN] = 11;
	XBYTE[PLL1_MODE] = 0x0f;	// 1111
	XBYTE[PLL_CTRL] &= 0xfe;

    while(!(XBYTE[PLL_CTRL] & 0x10));
	XBYTE[PLL_BYPASS] |= 0x01;	// use PLL1 as system clock 
}




